Workshop 03-WEHA

International Workshop on Energy-aware high performance Heterogeneous Architectures and Accelerators
(WEHA 2015)


As part of
The International Conference on High Performance Computing & Simulation (HPCS 2015)

July 20 – July 24, 2015
The Hilton Amsterdam Hotel
Amsterdam, The Netherlands

Extended Submission Deadline: April 24, 2015

Submissions could be for full papers, short papers, poster papers, or posters

The last decade has seen significant changes in processor architectures to improve computing performances and to overcome the physical limitations of increasing the clock frequency.

This allowed processors to still scale according to Moore's law. However, a new challenge is becoming relevant today: The ever increasing power and energy requirements for operating the latest generation of HPC systems are key factors in limiting the peek performances of newer HPC systems and might make Exascale computing unsustainable for both technical and economic reasons.

A possible solution is to find disruptive technologies in terms of new hardware architectures and energy aware system software which maximize the performance of HPC systems within a given power or energy budget.

For example, accelerators -- like GPUs, co-Processors, FPGAs -- and many-core low-power SoCs address this issue using different strategies.

The use of these is becoming more and more relevant in high performance computing. A challenge is a proper system design in order to be able to optimize the energy to solution and the time to solution for all applications running on the HPC system. Additionally, the interaction between the data center cooling infrastructure, the HPC system, the HPC system software -- including but not limited to scheduling systems, compilers, and run-time tools - and the running applications, have a great impact on the final power and energy efficiency of current and future HPC systems.

The workshop aims to strongly encourage the exchange of experiences and knowledge in novel solutions for improving the power and energy efficiency of HPC systems, and their application in HPC data centers. It focuses on analyzing and assessing new trends for high performance architecture, accelerators, and related changes in application algorithm design able to minimize the power and energy requirements for current and future HPC systems. Additionally, the workshop will look at challenges and tools for integrating the new generation HPC systems with the data centers for improved power and energy efficiency. 

The authors of the papers selected for the workshop may be invited to submit extended versions of their manuscripts to be considered for publication in a special issue. 

The WEHA Workshop topics include (but are not limited to) the following:
  • New Hardware Design
  • Accelerated Computing
  • Compiler and Run-time Tools
  • Energy-aware Applications
  • Data Centers and Resource Management Integration 
  • Novel Accelerator Architectures
  • Languages and Compilers for Hardware Accelerators
  • Libraries and Tools to Simplify the Programming of Hardware Accelerators
  • Manual and Automatic Optimization Techniques
  • Application Development Experience
  • Benchmarking of Hardware Accelerators
  • Modeling and Performance Prediction for Hardware Accelerators
  • Application-specific Acceleration Hardware/Software
  • Case Studies

You are invited to submit original and unpublished research works on above and other topics related to exploitation of hardware accelerators.  Submitted papers must not have been published or simultaneously submitted elsewhere. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and email addresses.  Please, indicate clearly the corresponding author and include up to 6 keywords and an abstract of no more than 400 words. The full manuscript should be at most 8 pages using the two-column IEEE format. Additional pages will be charged at additional fee.  Short papers (up to 4 pages), poster papers and posters (please refer to  for the posters submission details) will also be accepted for submission. In case of multiple authors, an indication of which author(s) is responsible for correspondence must be indicated. Please include page numbers on all submissions to make it easier for reviewers to provide helpful comments. 

Submit a PDF copy of your full manuscript to the Workshop organizers at  Acknowledgement will be sent within 48 hours of submission. 

Only PDF files will be accepted.  Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, contributions, technical clarity and presentation. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. Authors of accepted papers must guarantee that their papers will be registered and presented at the workshop. 

Accepted papers will be published in the conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2015 web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is to be published as ISBN proceedings by the IEEE and will be available online through IEEE Digital Library and indexed by major indexing services accordingly (e.g., EI indexing). 

A planned special issue of the Journal Concurrency and Computation: Practice and Experience will be available for selected papers of the workshop.  Best papers will be invited to submit an extended version. 

If you have any questions about paper submission or the workshop, please contact the workshop organizers. 

Paper Submissions: ------------------------------------- April 24, 2015
Acceptance Notification: -------------------------------  May 04, 2015
Camera Ready Papers and Registration Due by: ----- May 14, 2015
Conference Dates:  -------------------------------------- July 20 – 24, 2015


Andrea Bartolini    
   MicrelLab (DEI) - University of Bologna, Italy
   Phone: +39 
   Fax:     +39 

Carlo Cavazzoni    
   SuperComputing Applications and Innovation (SCAI) - CINECA, Bologna, Italy
   Phone: +39 051 6171 595
   Fax:     +39

International Program Committee*:  
All submitted papers will be reviewed by the workshop technical program committee members following similar criteria used in HPCS 2015.  
  • Giovanni Erbacci, CINECA Supercomputing Centre, Bologna, Italy
  • Jerry Eriksson, Royal Institute of Technology (KTH), Sweden
  • Radek Januszewski, PSNC Poznan Supercomputing and Networking Center, Poland
  • Sebastiona Fabio Schifano, UNIFE - Università degli studi di Ferrara, Italy
  • Torsten Wilde, LRZ - Leibniz Supercomputing Centre, Germany
  • TBA, TBA

   (*TPC is pending and will be finalized shortly.)

For information or questions about Conference's paper submission, tutorials, posters, workshops, special sessions, exhibits, demos, panels and forums organization, doctoral colloquium, and any other information about the conference location, registration, paper formatting, etc., please consult the Conference’s web site at URL: or  or contact one of the Conference's organizers.